Stencil technique for the preparation of thin-film Josephson devices

Abstract

We describe a photoresist stencil technique that has proven to be quite reliable in the preparation of thin-film Josephson logic and memory devices. The method employs multiple layers of resist with the top layer providing patterning and the bottom layer spacing the top layer from the substrate and providing an undercut under the top layer. This method has consistently produced uniform undercuts over ∠1 in. (∠2.54 cm) sample dimensions and has been used to produce micron-sized patterns.