A 0.45-V, 14.6-nW CMOS Subthreshold Voltage Reference With No Resistors and No BJTs

Yutao Wang, Zhangming Zhu, Jiaojiao Yao, Yintang Yang

IEEE Transactions on Circuits & Systems II Express Briefs · 2015 · 92 citations · 8 references

Concepts

Abstract

We present a low-voltage low-power CMOS subthreshold voltage reference with no resistors and no bipolar junction transistors in a wide temperature range. The temperature stability is improved by second-order compensation. By employing a bulk-driven technique and the MOS transistors working in the subthreshold region, the supply voltage and the power dissipation are reduced. Moreover, a trimming circuit is adopted to compensate for the process-related reference voltage variation. The proposed voltage reference has been fabricated with the 0.18-μm 1.8-V CMOS process. The measurement results show that the minimum power supply voltage is 0.45 V, the power consumption is 14.6 nW, the average temperature coefficient measured from -40 °C to 125 °C is 63.6 ppm/°C, and the line regulation is 1.2 mV/V in the power supply voltage ranging from 0.45 to 1.8 V. In addition, the chip area is 0.012 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .

References

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