Interface trap profile near the band edges at the 4H-SiC/SiO2 interface

Abstract

The transconductance of SiC metal–oxide–semiconductor field-effect transistors (MOSFETs) is typically much lower in devices fabricated on the 4H-SiC polytype compared to 6H. It is believed that this behavior is caused by extreme trapping of inversion electrons due to a higher density of traps Dit at the SiC/SiO2 interface in 4H-SiC. Here we present an approach for profiling Dit versus energy in the band gap using a modified capacitance–voltage technique on large-area MOSFETs. We find that Dit increases towards the conduction band edge Ec in both polytypes, and that Dit is much higher in 4H- compared to 6H-SiC for devices fabricated in the same process lot.