12.3: High Throughput CW‐Laser Lateral Crystallization for Low‐Temperature Poly‐Si TFTs and Fabrication of 16 bit SRAMs and 270MHz Shift Registers

Nobuo Sasaki, Akito Hara, F. Takeuchi, Y. Mishima, T. Kakehi, K. Yoshino, M. Takei

SID Symposium Digest of Technical Papers · 2002 · 20 citations · 1 references

Concepts

Abstract

Abstract Throughput improvement and fabrications of 4×4 bit SRAMs and 270 MHz shift registers are described for the CW‐Laser Lateral Crystallization (CLC) of amorphous‐Si on glass substrate. For the pixel array, effective area‐crystallization rate is improved to 48cm2/s for 171ppi and 68cm2/s for 119ppi by 16 sub‐laser‐beams and 2m/s scanning speed.

References

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