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12.3: High Throughput CW‐Laser Lateral Crystallization for Low‐Temperature Poly‐Si TFTs and Fabrication of 16 bit SRAMs and 270MHz Shift Registers
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2002
Year
EngineeringCrystal Growth TechnologyLaser ApplicationsIntegrated CircuitsShift RegistersMhz Shift RegistersSilicon On InsulatorWafer Scale ProcessingAdvanced Packaging (Semiconductors)Materials ScienceCrystalline DefectsCw‐laser Lateral CrystallizationBit SramsSemiconductor Device FabricationLow‐temperature Poly‐si TftsMicroelectronicsAbstract Throughput ImprovementApplied PhysicsAmorphous Solid
Abstract Throughput improvement and fabrications of 4×4 bit SRAMs and 270 MHz shift registers are described for the CW‐Laser Lateral Crystallization (CLC) of amorphous‐Si on glass substrate. For the pixel array, effective area‐crystallization rate is improved to 48cm2/s for 171ppi and 68cm2/s for 119ppi by 16 sub‐laser‐beams and 2m/s scanning speed.
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