ACM Transactions on Design Automation of Electronic Systems · 2015 · 33 citations · 31 references
EngineeringComputer EngineeringComputer ScienceComputer SecurityHardware SecurityReconfigurable ComputingCyber-physical SecurityFpga ArchitecturePhysical Unclonable FunctionsReconfigurable Embedded SystemsReconfigurable System ArchitectureSecurity For Reconfigurable HardwareElectronic Physical Unclonable FunctionsHardware Intellectual Property ProtectionPhysically Unclonable FunctionsReconfiguration SecurityReplayReplay Attack MitigationReplay AttacksTiming Overhead Analysis
The FPGA replay attack, where an attacker downgrades an FPGA-based system to the previous version with known vulnerabilities, has become a serious security and privacy concern for FPGA design. Current FPGA intellectual property (IP) protection mechanisms target the protection of FPGA configuration bitstreams by watermarking or encryption or binding. However, these mechanisms fail to prevent replay attacks. In this article, based on a recently reported PUF-FSM binding method that protects the usage of configuration bitstreams, we propose to reconfigure both the physical unclonable functions (PUFs) and the locking scheme of the finite state machine (FSM) in order to defeat the replay attack. We analyze the proposed scheme and demonstrate how replay attack would fail in attacking systems protected by the reconfigurable binding method. We implement two ways to build reconfigurable PUFs and propose two practical methods to reconfigure the locking scheme. Experimental results show that the two reconfigurable PUFs can generate significantly distinct responses with average reconfigurability of more than 40%. The reconfigurable locking schemes only incur a timing overhead less than 1%.
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Cloning Physically Unclonable Functions
Clemens Helfmeier, Christian Boit, Dmitry Nedospasov et al. · 2013 · 284 citations
Engineering, Computer Engineering, Electrical Engineering +11