A Hi-CMOSII 8Kx8 bit static RAM

Abstract

A Hi-CMOSII static RAM with 8K word by 8 bit organization has been developed. The RAM is fabricated using double polysilicon technology and p- and n-channel transistors having a typical gate polysilicon length of 2 /spl mu/m. The device was realized using low-power high-speed-oriented circuit design and a new redundancy circuit that utilizes laser diffusion programmable devices. The new RAM has an address access time of 65 ns, operating power dissipation of 200 mW, and standby dissipation of 10 /spl mu/W.