IEEE Transactions on Nuclear Science · 2013 · 86 citations · 11 references
Low-power ElectronicsElectrical EngineeringAtlas Muon UpgradeEngineeringVlsi DesignMixed-signal Integrated CircuitAnalog DesignFirst PrototypeComputer EngineeringComputer ArchitectureMicropattern DetectorsPresent Vmm1Detector PhysicInstrumentationMicroelectronicsBeyond CmosDetector Physics
We present VMM1, the first prototype of a family of front-end ASICs designed for the ATLAS muon upgrade. The ASIC will operate with MICROMEGAS and TGC detectors, providing charge and timing measurements along with other features including sub-hysteresis discrimination, address of the first event in real time, and digital output per channel for Time-over-Threshold measurements. The shaper, designed via the concept of Delayed Dissipative Feedback (DDF), supports analog dynamic ranges in excess of 10 \thinspace000. With a capacitance of 200 pF and a nominal peaking time of 25 ns, the ASIC offers resolution of charge and timing better than 1 fC and 1 ns, respectively, for input charges up to 2 pC. Designed in a commercial 130 nm technology it dissipates about 4.5 mW per channel.
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Front-End ASIC for a Liquid Argon TPC
Gianluigi De Geronimo, Alessio D’Andragora, Shaorui Li et al. · IEEE Transactions on Nuclear Science · 2011 · 56 citations