Scalability of ultra-thin-body and BOX InGaAs MOSFETs on silicon

Abstract

In this work, we show for the first time that VLSI-like gate-first self-aligned InGaAs MOSFETs on insulator on Si featuring raised source/drain (SID) can be fabricated at 300 nm pitch with gate lengths down to 24 nm. This is made possible thanks to the excellent thermal stability of ultra-thin-body and BOX InGaAs on insulator which can be used as a crystalline seed for III-V regrowth. The devices exhibit an excellent electrostatic integrity down to L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> = 34 nm, comparable to the best reported tri-gate devices. We compare experimental device data to electrostatic simulations for bulk/on-insulator/tri-gate structures and extrapolate their ultimate scalability to very short L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> .