Mitigating power- and timing-based side-channel attacks using dual-spacer dual-rail delay-insensitive asynchronous logic

Investigations of power analysis attacks on smartcards

Thomas S. Messerges, Ezzy A. Dabbish, Robert H. Sloan · 1999 · 354 citations

NULL Convention Logic/sup TM/: a complete and consistent logic for asynchronous digital circuit synthesis

Karl M. Fant, Scott Brandt · 2002 · 315 citations

Applied Logic, Boolean Logic, Null Convention Logic +20

Low-cost solutions for preventing simple side-channel analysis: side-channel atomicity

Benoît Chevallier-Mames, Mathieu Ciet, Marc Jóye · IEEE Transactions on Computers · 2004 · 274 citations

Cryptographic Primitive, Engineering, Information Security +19

Power-analysis attack on an ASIC AES implementation

Berna Örs, Frank K. Gürkaynak, Elisabeth Oswald et al. · 2004 · 224 citations

Hardware Security, Data Encryption Standard, Engineering +15

Design and Analysis of Dual-Rail Circuits for Security Applications

Danil Sokolov, Julian Murphy, A. Bystrov et al. · IEEE Transactions on Computers · 2005 · 150 citations

Engineering, Vlsi Design, Information Security +19