Hybrid CMOS-memristor based FPGA architecture

Abstract

It is understood that FPGAs suffer in terms of area, performance and power consumption relative to ASICs. With increasing demand for greater density and lower power consumption in memory devices, memristors have emerged as a cutting-edge alternative to transistor based circuitry. The basic issue of static power consumption in routing architecture is solved here as there is no static current flow in memristors; they hold their state when no power is applied. In this paper, a single memory cell based on hybrid technology is designed using TEAM model in memristors. In addition, the design of a configurable logic block (CLB), which can be used to fabricate a hybrid CMOS - Memristor FPGA architecture is explained. The paper also presents an Interconnect design based on hybrid technology which is very easy to design and flexible to program. As the routing architecture is the most important factor determining system speed, this hybrid interconnect could create a new generation of fast and power efficient memristor based FPGAs.