Toward Increasing FPGA Lifetime

TLDR

Field‑Programmable Gate Arrays are increasingly fabricated at lower gate lengths, which exacerbates reliability issues caused by physical phenomena such as transient errors and permanent failures. This study investigates how Time‑Dependent Dielectric Breakdown, Electromigration, Hot‑Carrier Effects, and Negative Bias Temperature Instability affect FPGA reliability and performance. The authors evaluate each phenomenon on the most vulnerable FPGA components, assessing both performance degradation and reliability loss. They demonstrate countermeasures that mitigate each failure mode and degradation, thereby extending FPGA operating lifetime.

Abstract

Field-Programmable Gate Arrays (FPGAs) have been aggressively moving to lower gate length technologies. Such a scaling of technology has an adverse impact on the reliability of the underlying circuits in such architectures. Various different physical phenomena have been recently explored and demonstrated to impact the reliability of circuits in the form of both transient error susceptibility and permanent failures. In this work, we analyze the impact of two different types of hard errors, namely, Time- Dependent Dielectric Breakdown (TDDB) and Electromigration (EM) on FPGAs. We also study the performance degradation of FPGAs over time caused by Hot-Carrier Effects (HCE) and Negative Bias Temperature Instability (NBTI). Each study is performed on the components of FPGAs most affected by the respective phenomena, from both the performance and reliability perspective. Different solutions are demonstrated to counter each failure and degradation phenomena to increase the operating lifetime of the FPGAs.