A Third-Generation 65nm 16-Core 32-Thread Plus 32-Scout-Thread CMT SPARC® Processor

Marc Tremblay, Shailender Chaudhry

2008 · 135 citations · 2 references

Concepts

Abstract

The goals for this high-end commercial microprocessor are high throughput and high single-thread performance, mainframe-class reliability, hardware transactional memory, and linear scalability. We show how these goals are met by the logical and physical design of this 2.3GHz 396mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> 16-core 32-thread plus 32-scout-thread microprocessor.

References

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