Concepedia

Hardware Transactional Memory

Hardware Transactional Memory is a microarchitectural mechanism that enables atomic, isolated, and consistent execution of memory transaction blocks by leveraging on-chip hardware support to detect and resolve data conflicts without explicit programmer-managed locking.

192

Publications

11.2K

Citations

423

Authors

123

Institutions

Publications per year

2017–2026

23

Variants

Htm

Parents

Publications

192

Hybrid transactional memory

Peter Damron, Alexandra Fedorova, Yossi Lev et al. · 2006 · 430 citations

, , +11

The art of multiprocessor programming

Maurice Herlihy · 2006 · 379 citations

, , +17

LogTM-SE: Decoupling Hardware Transactional Memory from Caches

Luke Yen, Jayaram Bobba, Michael R. Marty et al. · 2007 · 360 citations

, , +17

Virtualizing Transactional Memory

Ravi Rajwar, Maurice Herlihy, Konrad Lai · ACM SIGARCH Computer Architecture News · 2005 · 340 citations

, , +15

FPTree

Ismail Oukid, Johan Lasperas, Anisoara Nica et al. · 2016 · 317 citations · Full text

, , +12

1–5 of 192

Authors

423

  1. MM
    Mark Moir

    Oracle (United States), United States

    15 publications · 1.3K citations

    13

    h-index

  2. YL
    Yossi Lev

    Oracle (United States), United States

    16 publications · 1.1K citations

    13

    h-index

  3. OÜ
    Osman Ünsal

    Universitat Politècnica de Catalunya, Spain

    13 publications · 350 citations

    12

    h-index

  4. MH
    Maurice Herlihy

    Brown University, United States

    11 publications · 1.3K citations

    11

    h-index

  5. AC
    Adrián Cristal

    Universitat Politècnica de Catalunya, Spain

    10 publications · 306 citations

    10

    h-index

1–5 of 423

Institutions

123

  1. Oracle (United States)

    Austin, United States

    13 h-index

    36 publications

    2.5K citations

  2. Universitat Politècnica de Catalunya

    Barcelona, Spain

    13 h-index

    50 publications

    1.5K citations

  3. Intel (United States)

    Santa Clara, United States

    12 h-index

    27 publications

    2.9K citations

  4. Brown University

    Providence, United States

    11 h-index

    21 publications

    1.2K citations

  5. Barcelona Supercomputing Center

    Barcelona, Spain

    9 h-index

    35 publications

    767 citations

  6. University of Wisconsin–Madison

    Madison, United States

    9 h-index

    44 publications

    6.2K citations

  7. University of Rochester

    Rochester, United States

    8 h-index

    29 publications

    1.6K citations

  8. Stanford University

    Stanford, United States

    8 h-index

    54 publications

    4.2K citations

1–8 of 123

Venues

  1. ACM SIGARCH Computer Architecture News

    14 publications · 712 citations

    12

    h-index

  2. ACM SIGPLAN Notices

    4 publications · 169 citations

    4

    h-index

  3. IEEE Micro

    4 publications · 238 citations

    4

    h-index

  4. UR Research (University of Rochester)

    Repository · 3 publications · 267 citations

    3

    h-index

  5. RECERCAT (Consorci de Serveis Universitaris de Catalunya)

    Repository · 3 publications · 44 citations

    3

    h-index

1–5