Impact of layout and technology parameters on the thermal resistance of SiGe:C HBTs

Abstract

Calibrated 3-D numerical simulations supported by DC experimental data are employed to quantify the impact of the key layout and technology parameters on the thermal resistance of state-of-the-art SiGe heterojunction bipolar transistors (HBTs) so as to define proper optimization criteria. The geometry parameters of a simple scalable model are optimized to describe the thermal resistance dependence upon emitter dimensions for the HBTs under analysis.