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Low-resistance Ohmic conduction across compound semiconductor wafer-bonded interfaces
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1995
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SemiconductorsSemiconductor TechnologyElectrical EngineeringElectronic DevicesRotational AlignmentWafer Bonding SurfacesCrystalline DefectsEngineeringSpecific ResistanceWafer Scale ProcessingApplied PhysicsSemiconductor MaterialLow-resistance Ohmic ConductionSemiconductor Device
Data are presented demonstrating low-resistance Ohmic conduction across interfaces formed by high-temperature (750–1000 °C) compound semiconductor wafer bonding. Unipolar junctions formed by wafer bonding surfaces consisting of In0.5Ga0.5P/In0.5Ga0.5P, GaP/GaP, GaP/In0.5Ga0.5P, and In0.5Ga0.5P/GaAs are shown to exhibit low-resistance Ohmic conduction for both p- and n-isotype junctions. The achievement of these properties is demonstrated to be critically dependent upon the crystallographic alignment of the bonded wafer surfaces, irrespective of the lattice mismatch between the surfaces. Specifically, we show that the surface orientation of the bonded surfaces must be nominally matched while simultaneously maintaining rotational alignment of the wafers.