The effect of backgating on the design and performance of GaAs digital integrated circuits

Abstract

This paper presents an analysis of the effect of backgating on GaAs digital integrated circuits. Examples of backgating by negatively biased ohmic contacts located at various distances from a single transistor are given. The effect on individual devices within a generalized logic gate is considered and the resulting circuit performance dependence on duty cycle and power supply levels is illustrated. The relative susceptibility of various circuit configurations, including enhancement, and depletion mode technologies is discussed. Finally, mask layout considerations are presented.