A new approach to synthesize multiple-output functions using reversible programmable logic array

Abstract

In this paper, a new realization for logic functions, namely reversible programmable logic array (RPLA), has been proposed. The proposed realization has the advantage of regularity as compared to the existing non-PLA reversible realizations. A minimization technique is also presented along with the realization of reversible PLA. Experimental results are also shown for benchmark functions for the above realization.