A 45nm 37.3GOPS/W heterogeneous multi-core SoC

Yoichi Yuyama, Masayuki Itô, Yoshikazu Kiyoshige, Yusuke Nitta, Shigezumi Matsui, Osamu Nishii, Atsushi Hasegawa, Makoto Ishikawa, Tetsuya Yamada, Junichi Miyakoshi,

2010 · 38 citations · 6 references

Concepts

Abstract

A 648 MHz 153.8 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> 45 nm CMOS SoC integrates eight general-purpose CPUs, four dynamically reconfigurable processors, two 1024-way matrix-processors, peripherals and interfaces. Using core enhancement, DDR3-I/F improvement and clock buffer deactivation, this SoC achieves 37.3 GOPS/W at 1.15 V.

References

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