Seiji Mochizuki

A 256 mW 40 Mbps Full-HD H.264 High-Profile Codec Featuring a Dual-Macroblock Pipeline Architecture in 65 nm CMOS

Iwata Ken-ichi, Seiji Mochizuki, Motoki Kimura et al. · IEEE Journal of Solid-State Circuits · 2009 · 25 citations

Engineering, High-performance Architecture, Video Coding Format +9

A 342 mW Mobile Application Processor With Full-HD Multi-Standard Video Codec and Tile-Based Address-Translation Circuits

Iwata Ken-ichi, Takahiro Irita, Seiji Mochizuki et al. · IEEE Journal of Solid-State Circuits · 2010 · 20 citations

System On Chip, Engineering, High-performance Architecture +13

A 64 mW High Picture Quality H.264/MPEG-4 Video Codec IP for HD Mobile Applications in 90 nm CMOS

Seiji Mochizuki, Tetsuya Shibayama, M. Hase et al. · IEEE Journal of Solid-State Circuits · 2008 · 17 citations

Lossy Compression, Engineering, Macroblock-level Pipeline Method +11

4.2 A 12nm Autonomous-Driving Processor with 60.4TOPS, 13.8TOPS/W CNN Executed by Task-Separated ASIL D Control

Katsushige Matsubara, Hanno Lieske, Motoki Kimura et al. · 2021 · 16 citations

Engineering, Hardware Acceleration, Vlsi Architecture +14

A 342mW mobile application processor with full-HD multi-standard video codec

Iwata Ken-ichi, Takahiro Irita, Seiji Mochizuki et al. · 2009 · 15 citations

Hardware Security, Engineering, Multimedia Signal Processing +12