ComputingCloud ComputingComputer ScienceComputer ArchitectureParallel ComputingPerformance MeasurementConcurrent ProgrammingParallel ArchitecturesParallel Computing SystemsSoftware MetricsConcurrency BugsHigh PerformanceMetricsParallel Computing PerformanceParallel ProgrammingParallel SystemProductivity
Storage channels can be provably eliminated in well-designed, high-assurance kernels. Timing channels remain the last mile for confidentiality and are still beyond the reach of formal analysis, so must be dealt with empirically. We perform such an analysis, collecting a large data set (2,000 hours of observations) for two representative timing channels, the locally-exploitable cache channel and a remote exploit of OpenSSL execution timing, on the verified seL4 microkernel. We also evaluate the effectiveness, in bandwidth reduction, of a number of black-box mitigation techniques (cache colouring, instruction-based scheduling and deterministic delivery of server responses) across a number of hardware platforms. Our (somewhat unexpected) results show that while these defences were highly effective a few processor generations ago, the trend towards imprecise events in modern microarchitectures weakens the defences and introduces new channels. This demonstrates the necessity of careful empirical analysis of timing channels.
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A Mathematical Theory of Communication
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