A 32×32 50ps resolution 10 bit time to digital converter array in 130nm CMOS for time correlated imaging

Abstract

We report the design and characterisation of a 32times32 time to digital (TDC) converter plus single photon avalanche diode (SPAD) pixel array implemented in a 130 nm imaging process. Based on a gated ring oscillator approach, the 10 bit, 50 mum pitch TDC array exhibits a minimum time resolution of 50 ps, with accuracy of plusmn0.5 LSB DNL and 2.4 LSB INL. Process, voltage and temperature compensation (PVT) is achieved by locking the array to a stable external clock. The resulting time correlated pixel array is a viable candidate for single photon counting (TCSPC) applications such as fluorescent lifetime imaging microscopy (FLIM), nuclear or 3D imaging and permits scaling to larger array formats.