A self-calibrating 15 bit CMOS A/D converter

H.-S. Lee, D.A. Hodges, P.R. Gray

IEEE Journal of Solid-State Circuits · 1984 · 334 citations · 8 references

Concepts

Abstract

A self-calibrating analog-to-digital converter using binary weighted capacitors and resistor strings is described. Linearity errors are corrected by a simple digital algorithm. A folded cascode CMOS comparator resolves 30 /spl mu/V in 3 /spl mu/s. An experimental converter fabricated using a 6-/spl mu/m-gate CMOS process demonstrates 15-bit resolution and linearity at a 12-kHz sampling rate.

References

8