Publication | Closed Access
Room-temperature codeposition growth technique for pinhole reduction in epitaxial CoSi2 on Si (111)
49
Citations
13
References
1988
Year
Materials ScienceEpitaxial Cosi2Epitaxial GrowthEngineeringPhysicsCrystalline DefectsCosi2 FilmsSurface ScienceApplied PhysicsSemiconductor Device FabricationCf4 PlasmaSi CapThin FilmsSilicon On InsulatorMolecular Beam EpitaxyPinhole ReductionChemical Vapor Deposition
A solid phase epitaxy technique has been developed for the growth of CoSi2 films on Si (111) with no observable pinholes (103 cm−2 detection limit). The technique utilizes room-temperature codeposition of Co and Si in stoichiometric ratio, followed by the deposition of an amorphous Si capping layer and subsequent in situ annealing at 550–600 °C. CoSi2 films grown without the Si cap are found to have pinhole densities of 107–108 cm−2 when annealed at similar temperatures. A CF4 plasma etching technique was used to increase the visibility of the pinholes in the silicide layer. This plasma technique extends the pinhole detection resolution to 103 cm−2 and is independent of the pinhole size.
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