2014 · 62 citations · 7 references
ComputingComputer EngineeringComputer SystemsMachine LearningNeural CircuitryNeural EngineeringDeep LearningHardware AccelerationNeural NetworksSpiking Neural NetworksConvolutional Neural NetworksEnduranceEndurance Performance EnhancementEnergy-efficient ComputationNeural Circuit ArchitectureNeuromorphic DevicesNeuromorphic HardwareSpike-based Signal Processing
Software implementations of artificial Convolutional Neural Networks (CNNs), taking inspiration from biology, are at the state-of-the-art for Pattern Recognition (PR) applications and they are successfully used in commercial products [1]. However, they require power-hungry CPU/GPU to perform convolution operations based on computationally expensive sums of multiplications. This hinders their integration in portable devices. Some full CMOS-based hardware implementations of CNN have been suggested, but they still require the computation of multiplications [2]. In this work, we present for the first time to our knowledge a spike-based hardware implementation of CNN using HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> based OxRAM devices as binary synapses. OxRAM devices are chosen for their low switching energy [3] and promising endurance performance [4]. We perform an experimental and theoretical study of the impact of programming conditions at both device and system levels. A complex visual pattern recognition application is demonstrated with a spike-based hierarchical CNN, inspired from the mammalian visual cortex organization. A high accuracy (pattern recognition rate >94%) is obtained for all the tested programming conditions, even if the variability associated to weaker programming conditions is larger.
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