Hole and electron current transport in metal-oxide-nitride-oxide-silicon memory structures

Abstract

The carrier transport properties in metal-oxide (top oxide) nitride-oxide (tunnel oxide) silicon (MONOS) memory structures have been investigated in steady-state conditions under negative gate bias voltage. Carriers were separated into holes and electrons utilizing an induced junction of the p-channel MONOS transistors. Two-carrier transport is confirmed in the structure at negative gate polarity. It is found that the relatively thick top oxide acts as a potential barrier to the holes injected from the Si into the thin nitride. It is also found that a portion of the electrons injected from the gate at negative gate polarity recombine with the holes injected from the Si even in such a thin nitride and/or at the top-oxide/nitride interface.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>