‘Switch-Back Epitaxy’ as a Novel Technique for Reducing Stacking Faults in 3C-SiC

Abstract

A new technique that reduces stacking fault (SF) density in 3C-SiC, termed switch-back epitaxy (SBE), is demonstrated regarding its effects on morphological and electrical properties. SBE is a homoepitaxial growth process on backside of 3C-SiC grown on undulant-Si. The key feature of SBE, the surface polarity of residual SFs in 3C-SiC, which cannot be erased by heteroepitaxial growth on undulant-Si, is converted from the Si-face to the C-face. The SF density on the surface of 3C-SiC grown by SBE shows a remarkable decrease to one-seventh lower than that on undulant- Si. The leakage current of pn-diode epitaxially fabricated on the 3C-SiC substrate grown by SBE decreases to as low as one-thirtieth that on 3C-SiC substrate grown without SBE. These results suggest that SBE eliminates the SFs on the surface of 3C-SiC and subsequently reduces the leakage current at pn-junction thus fabricated.