Electronics Letters · 1973 · 17 citations · 1 references
EngineeringElectrical EngineeringMicroelectronicsMicrofabricationSemiconductor DevicesComplementary Metal-oxide-semiconductor TechnologyEtching ProcessesIntegrated Circuit DesignIntegrated Circuit FabricationMetal-oxide-semiconductor Field-effect TransistorsSemiconductor Device MaterialsAlignment TolerancesCmos Fabrication ProcessesEtchingEtching MasksFabricationSilicon EtchingSilicon Wafer ProcessingTransistor Sizing
An m.o.s. transistor structure in which the channel is defined by preferential etching of the silicon is described. The fabrication technology involves either a 3- or 4-mask process, and results in very-short-channel devices, using noncritical alignment tolerances. Experimental results obtained on the fabricated devices are presented, and possible uses of the technology are described.
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Proceedings of 1994 IEEE International Electron Devices Meeting
1994 · 183 citations