Vias-last process technology for thick 2.5D Si interposers

Abstract

Relative to traditional chip-to-substrate or chip-to-PCB packaging, solutions utilizing 2.5D silicon interposers can provide significantly higher I/O densities, resulting in reduced size, lower power consumption, and higher functionality [1,2]. One example of an advanced packaging application enabled by Si interposers is an embedded computing module (ECM) illustrated in Figure 1. Benefits of this advanced electronic packaging approach include (1) reduction in size by a factor of 2-3, (2) reduction in system power, and (3) elimination of on-die termination resistors [3].