A 1.2-V 10-$\mu$W NPN-Based Temperature Sensor in 65-nm CMOS With an Inaccuracy of 0.2 $^{\circ}$C (3$\sigma$) From $-$70 $^{\circ}$C to 125 $^{\circ}$C

Abstract

An NPN-based temperature sensor with digital output has been realized in a 65-nm CMOS process. It achieves a batch-calibrated inaccuracy of (3σ ) and a trimmed inaccuracy of (3σ) over the temperature range from to 125 . This performance is obtained by the use of NPN transistors as sensing elements, the use of dynamic techniques, i.e., correlated double sampling and dynamic element matching, and a single room-temperature trim. The sensor draws 8.3 from a 1.2-V supply and occupies an area of 0.1 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>