Enhanced Efficiency in Backside-Illuminated Deep-n-Well-Assisted CMOS Photovoltaic Devices

Abstract

A backside-illuminated deep-n-well-assisted CMOS photovoltaic device with a thinned substrate and an antireflective surface is demonstrated to improve the photocurrent collection efficiency from the low-lifetime bulk. The deep-n-well layer in a standard bulk CMOS process is utilized to maximize the junction area in order to collect more photocurrent before being recombined. An array of pyramid structure is realized to reduce the surface reflectivity and generate more photocurrent in the bulk. All efforts lead to a 33.37% ultimate efficiency and a 1.67-mW electrical power under 5-mW irradiated 980-nm illumination. With the unique advantages of high efficiency and CMOS compatibility, it is promising to practically integrate the proposed photovoltaic device with other microelectronics to realize a self-powered system.