Hierarchy based statistical fault simulation of mixed-signal ICs

Abstract

In this work we present a behavioral fault simulation technique for mixed-signal ICs, wherein a robust function approximation method namely regression splines are applied to automatically extract behavioral block parameters. The use of these robust high-level functions enables true behavioral fault simulation while preserving the statistical dependence on the process tolerance. We demonstrate significant speed-up over traditional Monte Carlo methods for two typical mixed-signal circuits, a sigma-delta modulator and a PLL.