Low power SRAM menu for SOC application using Yin-Yang-feedback memory cell technology

Abstract

We have developed the new "Yin-Yang" feedback technology for SRAM cells. This technology is applied to six-transistor cells and four-transistor cells, which are composed of transistors with the new D2G-SOI structure. At the 65-nm process node, these cells can operate at 0.7 V in mass-produced LSIs under real usage conditions. Max operating speeds are 300 MHz for the six-transistor and 200 MHz for the four-transistor cell. Leakage current of the four-transistor cell is about 1/1000 that of a conventional four-transistor cell. These cells provide a SRAM menu that allows us to optimally balance the requirements of various types of SRAM in low-power LSIs.