2002 · 40 citations · 14 references
EngineeringComputer EngineeringComputer ScienceCompilersComputer ArchitectureComputer-aided DesignHardware AccelerationInstruction Set ArchitecturePerformance OptimizationAbstract Data TypesAbstract TypesApplication InstructionsCompiler DesignCompiler SupportMicroarchitectural OptimizationPeephole OptimizationRisc Architectures
Programmable reduced instruction set computers (PRISC) are a new class of computers which can offer a programmable functional unit (PFU) in the context of a RISC datapath. PRISC create application-specific instructions to accelerate the performance for a particular application. Our previous work has demonstrated that peephole optimizations in a compiler can utilize PFU resources to accelerate the performance of general purpose programs. However these compiler optimizations are limited by the structure of the input source code. This work generalizes on our previous work, and demonstrates that the performance of general abstract data types such as short-set vectors, hash tables, and finite state machines is significantly accelerated (250%-500%) by using PFU resources. Thus, a wide variety of end-user applications can be specifically designed to use PFU resources to accelerate performance. Results from applications in the domain of computer-aided design (CAD) are presented to demonstrate the usefulness of our techniques.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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V. J. Rayward‐Smith, Thomas H. Cormen, Charles E. Leiserson et al. · Journal of the Operational Research Society · 1991 · 17K citations
The Art of Computer Programming
G.E. Whitesides · Nuclear Science and Engineering · 1970 · 6.1K citations
A 200-MHz 64-b dual-issue CMOS microprocessor
D. Dobberpuhl, Richard T. Witek, R. Allmon et al. · IEEE Journal of Solid-State Circuits · 1992 · 392 citations
Engineering, Computer Engineering, Electrical Engineering +17