Silicon based system-in-package: a passive integration technology combined with advanced packaging and system based design tools to allow a breakthrough in miniaturization

TLDR

The microelectronics industry is moving from shrinking SoCs to integrating external devices into SiPs, a trend known as “More than Moore.” The paper argues that SoCs and SiPs are complementary, illustrating this with multi‑SoC integration examples. The authors present a silicon‑based SiP technology that embeds passive components into silicon, supported by passive integration, advanced packaging, new IC design tools, and innovative testing.

Abstract

The very large development of home and domestic electronic appliances as well as portable device has led the microelectronics industry to evolve in two complimentary directions: "More Moore" with the continuous race towards extremely small dimensions hence the development of SoCs (system on chip) and more recently a new direction that we could name "More than Moore" with the integration of devices that were laying outside the chips and thus the creation of SiPs (system in package). Even though one can oppose SoCs to SiPs, one of the intentions of this paper is to demonstrate that these two approaches are not in competition one with the other. We show some examples of systems that integrate several SoCs. The technology presented is called silicon based system in package. This new technology is based upon the integration of passive devices into silicon. The four critical elements of this technology will be discussed in detail: passive integration, advanced packaging, new IC design development tools, and innovative testing.