High performance a‐IGZO thin‐film transistors with mf‐PVD SiO₂ as an etch‐stop‐layer

Abstract

Abstract In this work, we report on high‐performance bottom‐gate top‐contact (BGTC) amorphous‐Indium‐Gallium‐Zinc‐Oxide (a‐IGZO) thin‐film transistor (TFT) with SiO 2 as an etch‐stop‐layer (ESL) deposited by medium frequency physical vapor deposition (mf‐PVD). The TFTs show field‐effect mobility (μ FE ) of 16.0 cm 2 /(V.s), sub‐threshold slope (SS −1 ) of 0.23 V/decade and off‐currents (I OFF ) < 1.0 pA. The TFTs with mf‐PVD SiO 2 ESL deposited at room temperature were compared with TFTs made with the conventional plasma‐enhanced chemical vapor deposition (PECVD) SiO 2 ESL deposited at 300 °C and at 200 °C. The TFTs with different ESLs showed a comparable performance regarding μ FE , SS −1 , and I OFF , however, significant differences were measured in gate bias‐stress stability when stressed under a gate field of +/−1 MV/cm for duration of 10 4 s. The TFTs with mf‐PVD SiO 2 ESL showed lower threshold‐voltage (V TH ) shifts compared with TFTs with 300 °C PECVD SiO 2 ESL and TFTs with 200 °C PECVD SiO 2 ESL. We associate the improved bias‐stress stability of the mf‐PVD SiO 2 ESL TFTs to the low hydrogen content of the mf‐PVD SiO 2 layer, which has been verified by Rutherford‐Back‐Scattering‐Elastic‐Recoil‐Detection technique.