A CMOS VLSI Implementation of an Asynchronous ALU

Jim Garside

1993 · 69 citations · 0 references

Concepts

Abstract

A CMOS self-timed ALU has been developed as part of an asynchronous implementation of the ARM microprocessor. This unit exploits the data dependency inherent in many arithmetic operations to enable a small, simple ALU to deliver a mean performance comparable with that of a more sophisticated synchronous one with consequent reductions in both silicon area and electrical power consumption. The self-timed nature of the unit means that the majority of operations complete quickly whilst allowing rare `worst-case' operations to take longer, maintaining a high average throughput. This paper presents instruction usage statistics to justify the claimed performance and SPICE simulation results of measurements taken from the layout. Keyword Codes: B.2.0; B.2.1; B.7.1 Keywords: Arithmetic and Logic Structures, General; Arithmetic and Logic Structures, Design Styles,Integrated Circuits, Types and Design Styles 1. INTRODUCTION The ever-increasing availability of high performance processing has led ...