A Novel Silicon-on-Insulator Lateral Insulated-Gate Bipolar Transistor With Dual Trenches for Three-Phase Single Chip Inverter ICs

Abstract

A silicon-on-insulator lateral insulated gate bipolar transistor with dual trenches located under the high voltage interconnection (HVI), which can be used in 500 V three-phase single chip inverter ICs, is proposed in this letter for the first time. Using the dual trenches to sustain the electric potential from the collector region, the electric field crowding induced by HVI at the silicon surface can be alleviated. The influence of HVI can be shielded completely by adjusting the position and spacing of the trenches. The experimental results show that the breakdown voltage of the proposed structure is 550 V and its latch-up voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{V}_{\mathrm {\mathbf {LP}}})\vphantom {\big ({}}$ </tex-math></inline-formula> at gate-emitter voltage of 15 V ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{V}_{\mathrm {\mathbf {GE}}} = 15$ </tex-math></inline-formula> V) is higher than 500 V. The current density ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{J}_{\mathrm {\mathbf {C}}})$ </tex-math></inline-formula> is 129 A/cm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{\mathrm {\mathbf {2}}}$ </tex-math></inline-formula> when <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{V}_{\mathrm {\mathbf {GE}}} = 5$ </tex-math></inline-formula> V and collector-emitter voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{V}_{\mathrm {\mathbf {CE}}})$ </tex-math></inline-formula> is 3 V. The turn OFF time ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{t}_{\mathrm {\mathbf {OFF}}})$ </tex-math></inline-formula> is 132 ns at turn OFF current density of 84 A/cm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{\mathrm {\mathbf {2}}}$ </tex-math></inline-formula> .