Publication | Open Access
A virtual channel router for on-chip networks
80
Citations
14
References
2004
Year
Unknown Venue
Hardware SecurityEngineeringEdge ComputingSimple Dynamic ArbitrationRouter ArchitectureComputer EngineeringComputer ArchitectureNetwork On ChipRouter DesignVirtual Channel RouterComputer ScienceInterconnection Network ArchitectureAdvanced NetworkingOn-chip Network
This paper proposes an architecture of a virtual channel router for an on-chip network. The router has simple dynamic arbitration which is deterministic and fair. We show that the size of the proposed router is reduced by 49% and the speed increases 1.4 times compared to a conventional virtual channel router.
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