2002 · 141 citations · 3 references
EngineeringComputer EngineeringElectrical EngineeringElectronic MaterialsMicroelectronicsSemiconductor DevicesComplementary Metal-oxide-semiconductor TechnologyDevice ScalingMemory DevicesMemory Hierarchy DesignMos CapacitorsDynamic Random-access Memory DesignLow-power Memory CircuitsMemory Cell DesignMemory Circuit DesignNon-volatile Cmos MemoryNon-volatile Memory Design
A simple 1T DRAM cell concept is proposed for the first time. It exploits the body charging of PD SOI devices to store the information. This cell is at least two times smaller in area than the conventional 1T/1C DRAM cell and does not require the integration of a storage capacitor. This concept should allow the manufacture of low cost DRAMs and eDRAMs for 100 and sub 100 nm generations.
3
M. Yoshimi, Mamoru Terauchi, Akira Nishiyama et al. · IEEE Transactions on Electron Devices · 1997 · 47 citations
Engineering, Electrical Engineering, Materials Engineering +14