High-Performance Poly-Si Thin-Film Transistor With High-<inline-formula> <tex-math notation="LaTeX">$k$ </tex-math></inline-formula> ZrTiO<sub>4</sub> Gate Dielectric

Abstract

High-performance poly-Si thin-film transistors (poly-Si TFTs) with metal-induced laterally crystallized (MILC) poly-Si channel and high-k ZrTiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> (ZTO) gate dielectric are shown for the first time. The MILC poly-Si and ZTO dielectric showed smooth interface (~1.8 nm) with a low interfacial layer and 4.1 nm of effective-oxide thickness. The electrical performance of MILC poly-Si TFT with ZTO exhibited low threshold voltage of -0.5 V, steep subthreshold slope of 0.25 V/decade, high I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> /I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> of 1.8 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">7</sup> , and high field-effect mobility of 250 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs. These characteristics correspond to the best performance of the poly-Si TFTs with high-k gate dielectric reported so far. Moreover, the driving current and field-effect mobility of poly-Si TFT with ZTO gate dielectric were ten times higher than that of poly-Si TFT with deposited-SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> gate dielectric.