Concepedia

Topology-aware Mapping

Topology-Aware Mapping is a distributed memory parallelism technique that assigns computational tasks to processing units in accordance with the underlying hardware topology to minimize communication overhead and maximize data locality.

84

Publications

7.7K

Citations

228

Authors

113

Institutions

Publications per year

2017–2026

11

Parents

Publications

84

Measuring ISP topologies with rocketfuel

Neil Spring, Ratul Mahajan, David Wetherall · 2002 · 1.3K citations

, , +13

Measuring ISP Topologies With Rocketfuel

Neil Spring, Ratul Mahajan, David Wetherall et al. · IEEE/ACM Transactions on Networking · 2004 · 1K citations

, , +13

Energy- and performance-aware mapping for regular NoC architectures

Jingcao Hu, Radu Mărculescu · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2005 · 652 citations

, , +17

Energy-aware mapping for tile-based NoC architectures under performance constraints

Jingcao Hu, Radu Mărculescu · 2003 · 582 citations

, , +17

Virtual network embedding through topology-aware node ranking

Xiang Cheng, Sen Su, Zhongbao Zhang et al. · ACM SIGCOMM Computer Communication Review · 2011 · 532 citations

, , +15

1–5 of 84

Authors

228

  1. LV
    Laxmikant V. Kalé

    University of Illinois Urbana-Champaign, United States

    12 publications · 537 citations

    12

    h-index

  2. AB
    Abhinav Bhatelé

    Lawrence Livermore National Laboratory, United States

    12 publications · 527 citations

    12

    h-index

  3. DW
    David Wetherall

    University of Washington, United States

    4 publications · 2.9K citations

    4

    h-index

  4. NS
    Neil Spring

    University of Maryland, College Park, United States

    4 publications · 2.9K citations

    4

    h-index

  5. RM
    Ratul Mahajan

    Microsoft (United States), United States

    4 publications · 2.9K citations

    4

    h-index

1–5 of 228

Institutions

113

  1. University of Illinois Urbana-Champaign

    Urbana, United States

    14 h-index

    34 publications

    1.9K citations

  2. IBM Research - Thomas J. Watson Research Center

    Yorktown Heights, United States

    5 h-index

    10 publications

    605 citations

  3. Lawrence Livermore National Laboratory

    Livermore, United States

    4 h-index

    8 publications

    228 citations

  4. University of Washington

    Seattle, United States

    4 h-index

    13 publications

    9.7K citations

  5. Oak Ridge National Laboratory

    Oak Ridge, United States

    3 h-index

    7 publications

    143 citations

  6. University of Chicago

    Chicago, United States

    3 h-index

    8 publications

    104 citations

  7. Stanford University

    Stanford, United States

    3 h-index

    6 publications

    952 citations

  8. IBM (United States)

    Armonk, United States

    3 h-index

    6 publications

    391 citations

1–8 of 113

Venues

  1. Microprocessors and Microsystems

    MICPRO · 3 publications · 87 citations

    3

    h-index

  2. Parallel Processing Letters

    2 publications · 62 citations

    2

    h-index

  3. IEEE Transactions on Parallel and Distributed Systems

    TPDS · 2 publications · 79 citations

    2

    h-index

  4. ACM SIGCOMM Computer Communication Review

    CCR · 2 publications · 973 citations

    2

    h-index

  5. Computers & Graphics

    1 publications · 29 citations

    1

    h-index

1–5