Concepedia

Timing Rule Checking

Timing Rule Checking is a type of design rule checking that specifically verifies the temporal behavior of digital circuits to ensure that signal propagation times comply with specified timing constraints, distinguishing it from other design rule checks that focus on geometric or layout correctness.

3

Publications

71

Citations

8

Authors

2

Institutions

Publications per year

2017–2026

0

Variants

Timing Rule Check

Parents

Publications

3

1–3 of 3

Authors

8

  1. AK
    Aloysius K. Mok

    The University of Texas at Austin, United States

    1 publications · 12 citations

    1

    h-index

  2. NP
    Norman P. Jouppi

    Hewlett-Packard (United States), United States

    1 publications · 49 citations

    1

    h-index

  3. LC
    Liang Chen

    Fujian Normal University, China

    1 publications · 10 citations

    1

    h-index

  4. KV
    K. Venkat

    The University of Texas at Dallas, United States

    1 publications · 10 citations

    1

    h-index

  5. CW
    Chih-Kan Wang

    The University of Texas at Austin, United States

    1 publications · 12 citations

    1

    h-index

1–5 of 8

Institutions

2

  1. Stanford University

    Stanford, United States

    1 h-index

    1 publications

    49 citations

  2. The University of Texas at Austin

    Austin, United States

    1 h-index

    2 publications

    24 citations

1–2 of 2

Venues

  1. Real-Time Systems

    1 publications · 12 citations

    1

    h-index

  2. 1

    h-index

  3. IEEE Journal of Solid-State Circuits

    1 publications · 10 citations

    1

    h-index

1–3