Concepedia

Thread-level Parallelism

Thread-Level Parallelism is a parallel programming model that enables concurrent execution of multiple threads within a shared-memory multiprocessing environment by explicitly dividing a program into discrete, independently schedulable threads that operate on a common address space.

401

Publications

23.4K

Citations

1.1K

Authors

269

Institutions

Publications per year

2017–2026

50

Parents

Publications

401

Analyzing CUDA workloads using a detailed GPU simulator

Ali Bakhoda, George L. Yuan, Wilson Wai Lun Fung et al. · 2009 · 1.7K citations

, , +17

Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance

Rakesh Kumar, Dean M. Tullsen, Parthasarathy Ranganathan et al. · ACM SIGARCH Computer Architecture News · 2004 · 521 citations

, , +17

Data speculation support for a chip multiprocessor

Lance Hammond, Mark Willey, Kunle Olukotun · 1998 · 420 citations

, , +17

Simultaneous multithreading: a platform for next-generation processors

Susan J. Eggers, Joel Emer, Henry M. Levy et al. · IEEE Micro · 1997 · 407 citations

, , +17

Synergistic Processing in Cell's Multicore Architecture

Michael Gschwind, H. Peter Hofstee, B. Flachs et al. · IEEE Micro · 2006 · 406 citations

, , +17

1–5 of 401

Authors

1.1K

  1. AG
    Antonio González

    Universitat Politècnica de Catalunya, Spain

    15 publications · 1.1K citations

    14

    h-index

  2. DM
    Dean M. Tullsen

    University of California San Diego, United States

    10 publications · 2.4K citations

    10

    h-index

  3. MV
    Mateo Valero

    Universitat Politècnica de Catalunya, Spain

    9 publications · 213 citations

    9

    h-index

  4. TM
    Trevor Mudge

    University of Michigan, United States

    9 publications · 542 citations

    9

    h-index

  5. PM
    Pedro Marcuello

    Universitat Politècnica de Catalunya, Spain

    8 publications · 817 citations

    8

    h-index

1–5 of 1.1K

Institutions

269

  1. Intel (United States)

    Santa Clara, United States

    25 h-index

    130 publications

    7.7K citations

  2. Universitat Politècnica de Catalunya

    Barcelona, Spain

    23 h-index

    122 publications

    5.8K citations

  3. University of Michigan

    Ann Arbor, United States

    13 h-index

    47 publications

    3K citations

  4. Stanford University

    Stanford, United States

    12 h-index

    44 publications

    4.9K citations

  5. University of Illinois Urbana-Champaign

    Urbana, United States

    12 h-index

    35 publications

    2.1K citations

  6. University of California San Diego

    San Diego, United States

    11 h-index

    20 publications

    3.9K citations

  7. Hewlett-Packard (United States)

    Palo Alto, United States

    11 h-index

    23 publications

    4K citations

  8. Barcelona Supercomputing Center

    Barcelona, Spain

    10 h-index

    32 publications

    856 citations

1–8 of 269

Venues

  1. IEEE Transactions on Parallel and Distributed Systems

    TPDS · 18 publications · 759 citations

    15

    h-index

  2. ACM SIGARCH Computer Architecture News

    13 publications · 997 citations

    11

    h-index

  3. IEEE Transactions on Computers

    9 publications · 736 citations

    9

    h-index

  4. IEEE Micro

    9 publications · 1.6K citations

    9

    h-index

  5. ACM SIGPLAN Notices

    8 publications · 321 citations

    8

    h-index

1–5