Temperature-aware Cache Design
Temperature-Aware Cache Design is a low-power cache design methodology that incorporates thermal monitoring and management techniques to mitigate overheating in processor caches by dynamically adjusting cache organization, access patterns, or placement strategies based on real-time temperature feedback.
7
Publications
289
Citations
24
Authors
17
Institutions
Publications per year
2017–2026
1
Parents
7
A framework for dynamic energy efficiency and temperature management
Michael Huang, Jose Renau, Seung-Moon Yoo et al. · 2000 · 163 citations
1–5 of 7
24
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1–5 of 24
17
New Jersey Institute of Technology
Newark, United States
2 h-index
4 publications
73 citations

Pennsylvania State University
State College, United States
2 h-index
4 publications
85 citations

Peking University
Beijing, China
1 h-index
1 publications
16 citations
Wayne State University
Detroit, United States
1 h-index
3 publications
87 citations
China Academy of Information and Communications Technology
Beijing, China
1 h-index
1 publications
19 citations

Chinese Academy of Sciences
Beijing, China
1 h-index
1 publications
19 citations
Korea University
Seoul, South Korea
1 h-index
2 publications
44 citations
University of Michigan
Ann Arbor, United States
1 h-index
1 publications
29 citations
1–8 of 17
TDSC · 1 publications · 22 citations
1
h-index
1 publications · 19 citations
1
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1 publications · 29 citations
1
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TODAES · 1 publications · 16 citations
1
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1 publications · 10 citations
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