Temperature-aware Cache Design

Temperature-Aware Cache Design is a low-power cache design methodology that incorporates thermal monitoring and management techniques to mitigate overheating in processor caches by dynamically adjusting cache organization, access patterns, or placement strategies based on real-time temperature feedback.

7

Publications

289

Citations

24

Authors

17

Institutions

Publications per year

2017–2026

1

Authors

24

  1. YX
    Yuan Xie

    Pennsylvania State University, United States

    2 publications · 39 citations

    2

    h-index

  2. JH
    Jie Hu

    New Jersey Institute of Technology, United States

    2 publications · 39 citations

    2

    h-index

  3. GS
    Guangyu Sun

    Peking University, China

    2 publications · 39 citations

    2

    h-index

  4. MA
    Masud Ahmed

    University of Dhaka, Bangladesh

    1 publications · 29 citations

    1

    h-index

  5. YC
    Yuanqing Cheng

    Beihang University, China

    1 publications · 19 citations

    1

    h-index

1–5 of 24

Venues

  1. IEEE Transactions on Dependable and Secure Computing

    TDSC · 1 publications · 22 citations

    1

    h-index

  2. 1

    h-index

  3. Sustainable Computing Informatics and Systems

    1 publications · 29 citations

    1

    h-index

  4. ACM Transactions on Design Automation of Electronic Systems

    TODAES · 1 publications · 16 citations

    1

    h-index

1–5