Tamper-resistant Design

Tamper-Resistant Design is a protective architectural approach in security engineering that inherently incorporates mechanisms to deter, impede, or detect unauthorized modification of systems, data, or hardware through proactive structural and operational countermeasures.

Publications

6.9K

Citations

257

Authors

100

Institutions

Publications per year

2017–2026

Variants

Tamper-resistant Engineering

Parents

Tamper Detection

Publications

Tamper resistance: a cautionary note

Ross Anderson, Markus Kühn · 1996 · 909 citations

Computing, Computer Science, Computer Systems +17

Architectural support for copy and tamper resistant software

David Lie Chandramohan Thekkath, Mark L. Mitchell, Patrick Lincoln et al. · ACM SIGARCH Computer Architecture News · 2000 · 602 citations · Full text

Computing, Computer Engineering, Computer Science +17

Design principles for tamper-resistant smartcard processors

Oliver Kömmerling, Markus Kühn · 1999 · 543 citations

Computing, Computer Engineering, Computer Science +17

Test Wrapper and Test Access Mechanism Co-Optimization for System-on-Chip

Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen · Journal of Electronic Testing · 2002 · 404 citations

Engineering, Computer Engineering, Computer Science +14

Security as a new dimension in embedded system design

Paul Kocher, Ruby Lee, Gary McGraw et al. · 2004 · 391 citations

Engineering, Computer Engineering, Computer Science +15

1–5 of 94

Authors

257

JC
John C. Mitchell
Stanford University, United States
5 publications · 1K citations
5
h-index
MH
Mark Horowitz
Stanford University, United States
5 publications · 1K citations
5
h-index
KC
Krishnendu Chakrabarty
Duke University, United States
5 publications · 568 citations
5
h-index
ML
Mark L. Mitchell
University of Chicago, United States
4 publications · 931 citations
4
h-index
DB
Dan Boneh
Stanford University, United States
4 publications · 931 citations
4
h-index

1–5 of 257

Institutions

100

1–8 of 100

Venues

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014
Conference · 4 publications · 196 citations
4
h-index
ACM SIGARCH Computer Architecture News
3 publications · 674 citations
3
h-index
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2 publications · 30 citations
3
h-index
Journal of Computing and Information Science in Engineering
JCISE · 2 publications · 65 citations
2
h-index
IACR Transactions on Cryptographic Hardware and Embedded Systems
TCHES · 2 publications · 51 citations
2
h-index

1–5