Concepedia

System-level Testability

System-Level Testability is a design-for-testability attribute that characterizes the degree to which a complete integrated system can be effectively and efficiently tested as a unified whole, distinguishing it from component- or module-level testability by emphasizing global observability, controllability, and fault isolation across interconnected subsystems.

66

Publications

2.3K

Citations

189

Authors

87

Institutions

Publications per year

2017–2026

11

Parents

Publications

66

A set of benchmarks for modular testing of SOCs

Erik Jan Marinissen, V. Iyengar, Krishnendu Chakrabarty · 2003 · 306 citations

, , +16

A Survey on Automated Driving System Testing: Landscapes and Trends

Shuncheng Tang, Zhenya Zhang, Jixiang Zhou et al. · ACM Transactions on Software Engineering and Methodology · 2023 · 123 citations

, , +16

Optimal test access architectures for system-on-a-chip

Krishnendu Chakrabarty · ACM Transactions on Design Automation of Electronic Systems · 2001 · 112 citations

, , +15

Design of system-on-a-chip test access architectures under place-and-route and power constraints

Krishnendu Chakrabarty · 2000 · 109 citations · Full text

, , +17

On testability analysis of combinational networks.

F. Brglez · International Symposium on Circuits and Systems · 1984 · 97 citations

, , +11

1–5 of 66

Authors

189

  1. YZ
    Y. Zorian

    Cirrus Logic (United States), United States

    4 publications · 173 citations

    4

    h-index

  2. KC
    Krishnendu Chakrabarty

    Duke University, United States

    4 publications · 572 citations

    4

    h-index

  3. SD
    Stefano Di Carlo

    Politecnico di Torino, Italy

    3 publications · 58 citations

    3

    h-index

  4. PP
    P. Prinetto

    Politecnico di Torino, Italy

    3 publications · 58 citations

    3

    h-index

  5. MK
    Moez Krichen

    University of Sfax, Tunisia

    3 publications · 43 citations

    3

    h-index

1–5 of 189

Institutions

87

  1. Politecnico di Torino

    Turin, Italy

    5 h-index

    16 publications

    400 citations

  2. University of California San Diego

    San Diego, United States

    5 h-index

    8 publications

    272 citations

  3. Duke University

    Durham, United States

    4 h-index

    4 publications

    572 citations

  4. Intel (United States)

    Santa Clara, United States

    3 h-index

    3 publications

    164 citations

  5. IBM (United States)

    Armonk, United States

    3 h-index

    6 publications

    191 citations

  6. University of Sfax

    Sfax, Tunisia

    3 h-index

    7 publications

    102 citations

  7. Cirrus Logic (United States)

    Austin, United States

    2 h-index

    2 publications

    74 citations

  8. Al Baha University

    Al Bahah, Saudi Arabia

    2 h-index

    2 publications

    31 citations

1–8 of 87

Venues

  1. IEEE Design & Test of Computers

    4 publications · 92 citations

    4

    h-index

  2. Computer

    2 publications · 96 citations

    2

    h-index

  3. Proceedings EURO-DAC '92: European Design Automation Conference

    Conference · 1 publications · 31 citations

    1

    h-index

  4. 1

    h-index

  5. ACM Transactions on Design Automation of Electronic Systems

    TODAES · 1 publications · 112 citations

    1

    h-index

1–5