System-level Reconfiguration

System-Level Reconfiguration is a system-level method in embedded reconfigurable systems that enables dynamic adaptation of hardware and software resources across multiple reconfigurable components through centralized architectural redesign at runtime, distinguishing it from localized or module-level reconfiguration techniques.

121

Publications

4.7K

Citations

383

Authors

185

Institutions

Publications per year

2017–2026

30

Authors

383

  1. ZH
    Zeng‐Wei Hong

    Asia University, Taiwan

    2 publications · 38 citations

    2

    h-index

  2. MB
    M. Butts

    Mentor Technologies, United States

    2 publications · 195 citations

    2

    h-index

  3. JN
    J. N. Varghese

    Australian Nuclear Science and Technology Organisation, Australia

    2 publications · 195 citations

    2

    h-index

  4. TA
    Tarek AlGeddawy

    University of Windsor, Canada

    2 publications · 53 citations

    2

    h-index

  5. MP
    Marco Platzner

    Paderborn University, Germany

    2 publications · 90 citations

    2

    h-index

1–5 of 383

Venues

  1. IEEE Communications Magazine

    3 publications · 123 citations

    3

    h-index

  2. 3

    h-index

  3. Computer

    2 publications · 48 citations

    2

    h-index

  4. Microprocessors and Microsystems

    MICPRO · 2 publications · 38 citations

    2

    h-index

  5. HAL (Le Centre pour la Communication Scientifique Directe)

    Repository · 2 publications · 27 citations

    2

    h-index

1–5