Concepedia

System-level Power Optimization

System-Level Power Optimization is a formal methodology within power-aware design that targets the minimization of power consumption across the entire computing system by jointly considering hardware, software, and architectural components under performance, cost, and thermal constraints.

294

Publications

17.2K

Citations

847

Authors

276

Institutions

Publications per year

2017–2026

40

Parents

Publications

294

Orion: a power-performance simulator for interconnection networks

Hangsheng Wang, Xinping Zhu, Li-Shiuan Peh et al. · 2002 · 681 citations

, , +17

No "power" struggles

Ramya Raghavendra, Parthasarathy Ranganathan, Vanish Talwar et al. · 2008 · 628 citations

, , +15

Energy management for commercial servers

Charles Lefurgy, Karthick Rajamani, Freeman L. Rawson et al. · Computer · 2003 · 475 citations

, , +17

Optimal power allocation in server farms

Anshul Gandhi, Mor Harchol‐Balter, Rajarshi Das et al. · 2009 · 459 citations

, , +17

System-level power optimization

Luca Benini, Giovanni De Micheli · ACM Transactions on Design Automation of Electronic Systems · 2000 · 403 citations · Full text

, , +15

1–5 of 294

Authors

847

  1. LB
    Luca Benini

    University of Bologna, Italy

    11 publications · 923 citations

    10

    h-index

  2. HH
    Henry Hoffmann

    University of Chicago, United States

    9 publications · 665 citations

    9

    h-index

  3. GD
    Giovanni De Micheli

    École Polytechnique Fédérale de Lausanne, Switzerland

    8 publications · 936 citations

    8

    h-index

  4. BR
    Barry Rountree

    Lawrence Livermore National Laboratory, United States

    8 publications · 559 citations

    8

    h-index

  5. PR
    Parthasarathy Ranganathan

    Hewlett-Packard (United States), United States

    8 publications · 1.7K citations

    8

    h-index

1–5 of 847

Institutions

276

  1. Princeton University

    Princeton, United States

    13 h-index

    31 publications

    4.9K citations

  2. Lawrence Livermore National Laboratory

    Livermore, United States

    11 h-index

    24 publications

    1.4K citations

  3. Stanford University

    Stanford, United States

    11 h-index

    21 publications

    1.9K citations

  4. Intel (United States)

    Santa Clara, United States

    10 h-index

    36 publications

    1.9K citations

  5. University of California, Irvine

    Irvine, United States

    9 h-index

    22 publications

    648 citations

  6. Hewlett-Packard (United States)

    Palo Alto, United States

    9 h-index

    27 publications

    5.6K citations

  7. University of California San Diego

    San Diego, United States

    9 h-index

    20 publications

    726 citations

  8. University of Arizona

    Tucson, United States

    8 h-index

    17 publications

    1K citations

1–8 of 276

Venues

  1. 9

    h-index

  2. 8

    h-index

  3. ACM SIGARCH Computer Architecture News

    5 publications · 653 citations

    5

    h-index

  4. ACM Transactions on Design Automation of Electronic Systems

    TODAES · 5 publications · 698 citations

    5

    h-index

  5. ACM SIGPLAN Notices

    4 publications · 132 citations

    4

    h-index

1–5