Subprogram Declaration is a syntactic construct in VHDL that belongs to the class of declarative units and specifically defines the interface of a callable computational routine, including its name, parameter profile, and return type, without specifying its implementation details.
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2017–2026
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Subprogram Declaration
Parents
Publications
15
Section 8: Subset High Performance Fortran
Scientific Programming · 1993 · 44 citations · Full text
Barbara L. Gates · ACM SIGSAM Bulletin · 1985 · 24 citations · Full text
Economic range checks in pascal
James M. Welsh · Software Practice and Experience · 1978 · 23 citations
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- MDManfred Dausmann
1 publications · 10 citations
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- AP
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- LJ
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Institutions
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University of Twente
Enschede, The Netherlands
1 h-index
1 publications
24 citations
Université Paris-Sud
Orsay, France
1 h-index
1 publications
17 citations
University of Colorado Boulder
Boulder, United States
1 h-index
2 publications
28 citations
University of Cincinnati
Cincinnati, United States
1 h-index
2 publications
44 citations
Centre Inria de Saclay
Palaiseau, France
1 h-index
1 publications
17 citations
Électricité de France (France)
Paris, France
1 h-index
1 publications
10 citations
IBM Research - Thomas J. Watson Research Center
Yorktown Heights, United States
1 h-index
1 publications
32 citations
Boeing (United States)
Chicago, United States
1 h-index
2 publications
32 citations
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- Software Practice and Experience
2 publications · 38 citations
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- Communications of the ACM
2 publications · 25 citations
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- Journal of Symbolic Computation
1 publications · 17 citations
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- ACM SIGNUM Newsletter
1 publications · 16 citations
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- IBM Journal of Research and Development
1 publications · 32 citations
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