Static Instruction Scheduling is a compiler optimization technique that belongs to the class of instruction scheduling methods, distinguished by its determination of instruction order during compilation rather than at runtime, thereby enabling predictable execution on processors with instruction-level parallelism.
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2.5K
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121
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35
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2017–2026
2
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Publications
49
Synthesis techniques for low-power hard real-time systems on variable voltage processors
Inki Hong, Gang Qu, Miodrag Potkonjak et al. · 2002 · 186 citations · Full text
Dynamic memory disambiguation using the memory conflict buffer
David Gallagher, William Y. Chen, Scott Mahlke et al. · 1994 · 148 citations
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Authors
121
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1–5 of 121
Institutions
35
Stanford University
Stanford, United States
3 h-index
9 publications
570 citations
Philips (Netherlands)
Amsterdam, The Netherlands
3 h-index
6 publications
202 citations
The University of Texas at Austin
Austin, United States
3 h-index
19 publications
709 citations
Eindhoven University of Technology
Eindhoven, The Netherlands
3 h-index
4 publications
136 citations
Northeastern University
Boston, United States
2 h-index
10 publications
125 citations
Panasonic (Japan)
Kadoma, Japan
2 h-index
8 publications
680 citations
Clemson University
Clemson, United States
2 h-index
6 publications
141 citations
Waseda University
Tokyo, Japan
2 h-index
6 publications
192 citations
1–8 of 35
Venues
- ACM SIGARCH Computer Architecture News
3 publications · 201 citations
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- International Symposium on Microarchitecture
Conference · 1 publications · 33 citations
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- IEEE Transactions on Computers
1 publications · 42 citations
1
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- TU/e Research Portal
Repository · 1 publications · 21 citations
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- Journal of Parallel and Distributed Computing
1 publications · 14 citations
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